16 x 2 LCD interfacing with uC

16x2 LCD Display is interfaced with port P1 and Port P2 of 8051 microcontroller. Assemebly language program code is wriiten to display "Fine" on First line Fifth column of LCD display with using and Without using Busy Flag status.

Circuit Diagram:

Assemebly language program Without using Busy Flag status:-

org 0000h
mov a, #38h
acall config
acall delay
mov a, #0eh
acall config
acall delay
mov a, #01h
acall config
acall delay
mov a, #06h
acall config

acall delay
mov a, #84h
acall config
acall delay
mov a, #'F'
acall display
acall delay
mov a, #'i'
acall display
acall delay
mov a, #'n'
acall display
acall delay
mov a, #'e'
acall display
acall delay

config:
mov p2, a
clr p1.2 ;rs
clr p1.1 ;r/w
setb p1.0 ;e
acall delay
clr p1.0 ;e
ret
display:
mov p2, a
setb p1.2
clr p1.1 ;r/w
setb p1.0 ;e
acall delay
clr p1.0 ;e
ret
delay:
mov r2, #01h
here3: mov r3, #00h
here2: mov r4, #00h
here: djnz r4, here
djnz r3, here2
djnz r2, here3
ret
end

Assemebly language program Without using Busy Flag status:-

org 0000h

acall delay
mov a, #38h
acall config

mov a, #0eh
acall config
mov a, #01h
acall config
mov a, #06h
acall config
mov a, #84h
acall config

mov a, #F
acall display
mov a, #'i'
acall display
mov a, #'n'
acall display
mov a, #'e'
acall display

main:
ajmp main
config:
acall ready
mov p2, a
clr p1.2 ;rs
clr p1.1 ;r/w
setb p1.0 ;e
nop
nop
nop
nop
clr p1.0 ;e
ret
display:
acall ready
mov p2, a
setb p1.2 ;rs
clr p1.1 ;r/w
setb p1.0 ;e
nop
nop
nop
nop
clr p1.0 ;e
ret
ready:
setb p1.7
clr p1.2 ;rs
setb p1.1 ;r/w
repeat: clr p1.0 ;e
nop
nop
nop
setb p1.0 ;e
jb p1.7, repeat
ret
delay:
mov r2, #2ah
here3: mov r3, #00h
here2: mov r4, #00h
here: djnz r4, here
djnz r3, here2
djnz r2, here3
ret
end